AMD unveils Zen 6 on 2nm and next-gen GPUs at AI event

AMD's Advancing AI conference this week will lay out its most aggressive product roadmap in years, challenging Nvidia's dominance across both CPU and GPU data center markets.

Advanced Micro Devices Inc. will unveil its Zen 6-based EPYC "Venice" server processor built on TSMC's 2nm node and next-generation MI450x and MI500 AI accelerators at its Advancing AI conference in San Francisco on Wednesday, setting up its most direct challenge yet to Nvidia Corp.'s data center hegemony.

"This is AMD's opportunity to reset the competitive narrative after losing share in the inference market," UBS analyst Timothy Arcuri wrote in a preview note, reiterating a buy rating and raising his price target to $700 from $670.

The Venice processor, codenamed after the Italian city, represents AMD's first server chip on TSMC's 2nm process node (which packs roughly 1.3x the transistor density of 3nm, improving performance per watt). It will compete directly with Intel Corp.'s upcoming Granite Rapids Xeon 7-series. On the GPU side, the MI450x and MI500 accelerators aim to close the gap with Nvidia's Blackwell B200, which delivers 4.5 petaflops of FP8 performance. AMD has not disclosed pricing or full specifications ahead of the event.

AMD shares, down 16% over the past three sessions to around $490, have shed gains from a year-to-date rally that still leaves them up 132%. The stock trades at roughly 28x forward earnings, a discount to Nvidia's 35x, reflecting the market's skepticism about AMD's ability to capture meaningful AI GPU market share. UBS's $700 target implies roughly 43% upside from current levels.

The conference comes amid swirling speculation that AMD has secured, or is close to securing, Anthropic as a chip customer. A YAML code file by Anush Elangovan, a vice president of AI software at AMD, listed the Claude developer as a "customer" with the maximum 30 priority boost points — placing it alongside existing hyperscale clients such as Meta Platforms Inc., chip news site SemiAnalysis reported Sunday. Anthropic has also been hiring engineers with experience in AMD's ROCm software stack, Jefferies analyst Blayne Curtis noted in a recent report.

Anthropic is not a publicly confirmed AMD customer. The startup has said it trains and serves Claude using a mix of Nvidia GPUs, Amazon.com Inc.'s Trainium chips, and Alphabet Inc.'s Tensor Processing Units, with Amazon Web Services remaining its primary cloud partner. If confirmed, the win would mark AMD's first major AI customer outside of the hyperscaler cohort and validate years of investment in its ROCm software ecosystem, which has long lagged Nvidia's CUDA platform in developer adoption.

Venice and the CPU Reset

The EPYC Venice processor arriving on TSMC's 2nm node represents a generational leap for AMD's server CPU line. The 2nm process (which uses gate-all-around nanosheet transistors rather than the finFET design of 3nm and earlier nodes) delivers approximately 15% faster speeds at the same power or 30% lower power at the same speed, according to TSMC's published specifications. That efficiency gain is critical in data centers where power constraints increasingly limit server density.

AMD's previous EPYC "Turin" generation, based on Zen 5 on 4nm and 3nm nodes, has been competing against Intel Corp.'s Xeon 6-series. Venice extends AMD's architectural lead at a moment when Intel is struggling to regain process parity. Intel's 18A node, which the company has touted as its comeback process, is not expected in volume server production until late 2026 or early 2027.

The GPU Roadmap and the Nvidia Wall

On the accelerator side, the MI450x and MI500 represent AMD's answer to Nvidia's Blackwell and forthcoming Rubin architectures. AMD's current MI300X, built on CDNA 3 architecture, delivers 1.3 petaflops of FP16 performance with 192 GB of HBM3 memory. The MI450x is expected to double memory bandwidth through HBM3e or HBM4 adoption, while the MI500 could introduce a chiplet-based design that scales compute density beyond monolithic reticle limits.

Nvidia's Blackwell B200, which began shipping in volume this quarter, delivers 4.5 petaflops of FP8 tensor performance with 384 GB of HBM3e memory across 208 billion transistors. AMD has not disclosed whether its next-gen accelerators will match or exceed those specifications, and independent benchmarks will be needed to verify any performance claims made at the conference.

Investment Implications

For investors, the key question is whether AMD's product roadmap can translate into revenue share gains in the AI accelerator market, where Nvidia commands an estimated 80% to 85% of data center GPU shipments. AMD's data center segment revenue grew 82% year-over-year in the most recent quarter to $3.5 billion, but that remains a fraction of Nvidia's data center revenue, which exceeded $30 billion in the same period.

UBS's Arcuri said the conference is more likely to showcase technology roadmaps than announce specific customer wins or financial targets. "The Venice and MI500 roadmaps give AMD a credible path to competing across the full data center compute stack," he wrote. "But execution on software and customer adoption remains the variable that will determine whether this translates to market share."

AMD is scheduled to report second-quarter results on Aug. 4.

This article is for informational purposes only and does not constitute investment advice.